/*
 *  linux/include/asm-arm/arch-clps711x/hardware.h
 *
 *  This file contains the hardware definitions of the Prospector P720T.
 *
 *  Copyright (C) 2000 Deep Blue Solutions Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H



#define CLPS7111_VIRT_BASE	0xff000000
#define CLPS7111_BASE		CLPS7111_VIRT_BASE


#define ZIPLINE_VIRT_BASE	CLPS7111_VIRT_BASE
#define ZIPLINE_BASE		CLPS7111_VIRT_BASE
#include "ep7312.h"

#define SYSPLD_VIRT_BASE	0xfe000000
#define SYSPLD_BASE		SYSPLD_VIRT_BASE

#ifndef __ASSEMBLER__

#define PCIO_BASE		IO_BASE

#endif


/*
 * The extra 8 lines of the keyboard matrix are wired to chip select 3 (nCS3)
 * and repeat across it. This is the mapping for it.
 *
 * In jumpered boot mode, nCS3 is mapped to 0x4000000, not 0x3000000. This
 * was cause for much consternation and headscratching. This should probably
 * be made a compile/run time kernel option.
 */
#if 0
#define ZIPLINE_PHYS_EXTKBD		CS3_PHYS_BASE	/* physical */

#define ZIPLINE_VIRT_EXTKBD		(0xfd000000)	/* virtual */
#endif
/*
 * The CS8900A ethernet chip has its I/O registers wired to chip select 2
 * (nCS2). This is the mapping for it.
 *
 * In jumpered boot mode, nCS2 is mapped to 0x5000000, not 0x2000000. This
 * was cause for much consternation and headscratching. This should probably
 * be made a compile/run time kernel option.
 */
#define ZIPLINE_PHYS_CS8900A		CS3_PHYS_BASE	/* physical */

#define ZIPLINE_VIRT_CS8900A		(0xfc000000)	/* virtual */


/*
 * The two flash banks are wired to chip selects 0 and 1. This is the mapping
 * for them.
 *
 * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running
 * in jumpered boot mode.
 */
#define ZIPLINE_PHYS_FLASH		CS0_PHYS_BASE	/* physical */

#define ZIPLINE_VIRT_FLASH		(0xfb000000)	/* virtual */

/*
 * The Radio chip selects are wired to chip selects 1 and 2. This is the mapping
 * for them.
 */

#define ZIPLINE_PHYS_RADIO_IO		CS1_PHYS_BASE	/* physical */

#define ZIPLINE_VIRT_RADIO_IO		(0xfa000000)	/* virtual */

#define ZIPLINE_PHYS_RADIO_CONFIG	CS2_PHYS_BASE	/* physical */

#define ZIPLINE_VIRT_RADIO_CONFIG	(0xf9000000)	/* virtual */

#define ZIPLINE_PHYS_SRAM_CONFIG		CS6_PHYS_BASE	/* physical */

#define ZIPLINE_VIRT_SRAM_CONFIG		(0xf8000000)	/* virtual */
#define SRAM_SIZE			(0xc000)

#define FLASH_START      CS0_PHYS_BASE
#define FLASH_SIZE       0x00200000
#define FLASH_WIDTH      2

#define ZIPLINE_VIRT_SDRAM_FRAMEBUFFER	0xF7000000
#define ZIPLINE_PHYS_SDRAM_FRAMEBUFFER	0xC0000000
#define ZIPLINE_SIZE_SDRAM_FRAMEBUFFER	0x00020000

/*
 * Relevant bits in port D, which controls power to the various parts of
 * the LCD on the EDB7211.
 */
#define EDB_PD1_LCD_DC_DC_EN	(1<<1)
#define EDB_PD2_LCDEN		(1<<2)
#define EDB_PD3_LCDBL		(1<<3)


#endif